Our Research Directions
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Ferroelectric RAM and BEOL Memory
Advanced Logic Transistors
Defects and Reliability
Microstructure and Interfaces
Selected Publications
P. Venkatesan, C. Li, A. Padovani, Z. Wang, H. Jayasankar, P. Ravikumar, M. Nabian, K. Tangsali, S. Nidhan, J. Vamaraju, R. Cherukuri, P. Mathur, E. Piccinni, R. Foiera, R. Gaffetanu, K. A. Aabrar, S. Datta, S. Kalidindi, L. Larcher, A. Khan, Y. Wang, & G. Thareja. “VLPred: Accelerated Endurance Prediction Platform Enabled by AI Surrogates.” The 2025 IEEE International Electron Devices Meeting (IEDM 2025). https://doi.org/10.1109/iedm50572.2025.11353672
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Selected Publications
P. Ravikumar, P. Venkatesan, C. Park, N. Afroze, M. Tian, W. Chern, S. Datta, S. Yu, S. Mahapatra, and A. I. Khan, “The First Switch Effect in Ferroelectric Field-Effect Transistors,”IEEE Transactions on Device and Materials Reliability, vol, vol. 25, pp. 365–370, 2025. https://doi.org/10.1109/tdmr.2025.3576042
P. G. Ravikumar, P. V. Ravindran, K. A. Aabrar, T. Song, S. G. Kirtania, D. Das, C. Park, N. Afroze, M. Tian, S. Yu, A. E. Islam, S. Datta, S. Mahapatra, & A. Khan. “Comprehensive time dependent dielectric breakdown (TDDB) characterization of ferroelectric capacitors under bipolar stress conditions.” The 2024 IEEE International Reliability Physics Symposium (IRPS 2024). https://doi.org/10.1109/irps48228.2024.10529414
P. Ravikumar, A. Padovani, C. Park, P. Venkatesan, M. Desouky, S. Yu, L. Larcher, G. Thareja, K. Kim, K. Seo, K. Kim, W. Kim, W. Ha, & A. Khan. “Experimental Demonstration of Robust High Temperature Operation with 104 Endurance and Stable V at 125 ◦C Enabled by IL Scavenging in Si Th Channel FeFETs.” The 2025 IEEE International Electron Devices Meeting (IEDM 2025). https://doi.org/10.1109/iedm50572.2025.11353477
P. Venkatesan, A. Padovani, L. Fernandes, P. G. Ravikumar, C. Park, H. Tran, Z. Wang, H. Jayasankar, A. Garlapati, T. Song, H. Chen, W. Chern, Z. Wang, K. Kim, J. Woo, S. Lim, K. Kim, W. Kim, D. Ha, S. Yu, S. Datta, L. Larcher, G. Thareja, A. Khan, “Enhanced memory performance in ferroelectric NAND applications: The role of tunnel dielectric position for robust 10-year retention,” in Proceedings of the IEEE International Reliability Physics Symposium (IRPS), Apr. 2025. (Best student paper award) https://doi.org/10.1109/irps48204.2025.10982749
Z. Wang, N. Tasneem, J. Hur, H. Chen, S. Yu, W. Chern, A. I. Khan, “Stand by bias improvement of read after write delay in ferroelectric field effect transistors.” The 67th IEEE International Electron Devices Meeting (IEDM 2021), pages 19.3.1–19.3.4 (2021). https://doi.org/10.1109/iedm19574.2021.9720502
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The First Switch Effect in Ferroelectric Transistors | Priyankka R. | IIRW 24 Best Student Paper
Understanding correlation between MW, leakage & RWD for FEFET reliability | Priyankka R. | IRPS 2025
Trap Capture and Emission Dynamics in FeFETs and Impact on Operation & Reliability
Comprehensive TDDB characterization of ferroelectric capacitors | Priyankka G. | IRPS 2024
Ferroelectric NAND Storage w/ Robust Retention | Prasanna V. | IRPS 2025 Best Student Paper Award
Endurance Enhancement in Low Operating Voltage Scavenged SOI FEFETs | Chinsung Park | DRC 2025
High-Temperature Operation in Si-Channel FEFETs Enabled by Interfacial-Layer Scavenging | IEDM 2025
Selected Publications
N. Afroze, H. Fahrvandi, G. Ren, P. Kumar, C. Nelson, S. Lombardo, M. Tian, P.-C. Lee, J. Chen, M. Noor, K. Chae, S. Kang, P. V. Ravindran, M. Bergschneider, G. Y. Jung, P. Omprakash, G. K. Ligonde, N. Tasneem, D. Triyoso, S. Consiglio, K. Tapily, R. Clark, G. Leusink, J. Ravichandran, S. Yu, A. Lupini, A. Kummel, K. Cho, D.-H. Choe, N. Bassiri-Gharb, J. Kacher, R. Mishra, J. H. Lee, and A. I. Khan, “Sub-nm2 ferroelectric domains via charged 180 degree walls in ZrO2,” arXiv, 2025. https://arxiv.org/abs/2507.18920
P. Venkatesan, Y. Chen, T. P. O’Neill, H. L. Chan, H. Jayasankar, P. Ravikumar, Z. Wang, S. B. Fields, M. K. Lenox, W. A. Hubbard, A. Padovani, L. Larcher, G. Thareja, S. Yu, J. F. Ihlefeld, W. Kim, D. Ha, B. C. Regan, & A. Khan. “Direct Observation of Nanoscale Polarization Switching in HZO Ferroelectrics Using STEM-EBIC.” The 2025 IEEE International Electron Devices Meeting (IEDM 2025). https://doi.org/10.1109/iedm50572.2025.11353770
N. Tasneem, H. Kashyap, K. Chae, C. Park, P. C. Lee, S. F. Lombardo, N Afroze, M. Tian, H. Kumarasubramanian, J. Hur, H. Chen, W. Chern, S. Yu, P. Bandaru, J. Ravichandran, K. Cho, J. Kacher, A. C. Kummel, and A. I. Khan. “Remote Oxygen Scavenging of the Interfacial Oxide Layer in Ferroelectric Hafnium–Zirconium Oxide-Based Metal–Oxide–Semiconductor Structures.”.ACS Applied Materials & Interfaces, vol. 14, no. 38, pp. 43897–43906, 2022. https://doi.org/10.1021/acsami.2c11736
N. Tasneem, Y. M. Yousry, M. Tian, M. Dopita, S. E. Reyes-Lillo, J. Kacher, N. Bassiri-Gharb, A. I. Khan. “A Janovec-Kay-Dunn-Like Behavior at Thickness Scaling in Ultra-Thin Antiferroelectric ZrO 2 Films.”Advanced Electronic Materials. vol. 7, pp. 2100485–1–2100485–9, 2021. https://doi.org/10.1002/aelm.202100485
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Selected Publications
L. Fernandes, S. Wodzro, P. Venkatesan, P. Ravikumar, M.-Y. Lee, M. Shon, D. Chakraborty, T. Song, S. Kang, S. Soliman, M. Tian, J. Yeager, J. Adler, J. Chen, Z. Wang, D. Wolfe, S. Yu, A. Padovani, S. Datta, B. Ray, and A. I. Khan, "Enabling Radiation Hardness in Solid-State NAND Storage Utilizing a Laminated Ferroelectric Stack, "Nano Letters, vol. 26, no. 10, pp. 3390–3397, 2026. https://doi.org/10.1021/acs.nanolett.5c05947
P. Venkatesan, L. Fernandes, S. Kang, P. Ravikumar, T. Song, C. Park, D. Das, K. H. P. Kim, K. Seo, K. Kim, K. Ni, A. Padovani, M. Pakala, L. Larcher, G. Thareja, W. Kim, D. Ha, and A. I. Khan, "Pushing the limits of NAND technology scaling with ferroelectrics, ".MRS Bulletin, vol. 50, pp. 1094–1107, 2025. https://doi.org/10.1557/s43577-025-00991-y
P. Venkatesan, C. Park, T. Song, L. Fernandes, D. Das, N. Afroze, P. Ravikumar, M. Tian, H. Chen, W. Chern, K. Kim, J. Woo, S. Lim, K. Kim, W. Kim, D. Ha, S. Mahapatra, S. Yu, S. Datta, & A. Khan. “Disturb and its mitigation in Ferroelectric Field-Effect Transistors with Large Memory Window for NAND Flash Applications.”IEEE Electron Device Letters, vol. 45, no. 12, pp. 2367–2370, 2024. (Editor’s Pick). https://doi.org/10.1109/led.2024.3467210
L. Fernandes, P. V. Ravindran, T. Song, D. Das, C. Park, N. Afroze, M. Tian, H. Chen, W. Chern, K. Kim, J. Woo, S. Lim, K. Kim, W. Kim, D. Ha, S. Yu, S. Datta, & A. Khan. “Material Choices for Tunnel Dielectric Layer and Gate Blocking Layer for Ferroelectric NAND Applications.”IEEE Electron Device Letters, vol. 45, no. 10, pp. 1776–1779, 2024. https://doi.org/10.1109/led.2024.3437239
D. Das, H. Park, Z. Wang, C. Zhang, P. Venkatesan Ravindran, C. Park, N. Afroze, P.-K. Hsu, M. Tian, H. Chen, W. Chern, S. Lim, K. Kim, K. Kim, W. Kim, D. Ha, S. Yu, S. Datta, & A. Khan, “Trap Experimental demonstration and modeling of a ferroelectric gate stack with a tunnel dielectric insert for NAND applications.” The 2023 IEEE International Electron Devices Meeting (IEDM 2023), pages 12.4.1–12.4.4 (2023). https://doi.org/10.1109/iedm45741.2023.10413697
Patents
L. Fernandes, A. I. Khan, and S. Datta, “1 Mrad Total Ionizing Dose (TID) Immunity in Laminated FeFETs for Rad-Hard V-NAND Storage Applications,” U.S. Provisional Application No. 63/908,404, filed Oct. 30, 2025.
K. Kim, P. V. Ravindran, A. I. Khan, K. Kim, W. Kim, J. Woo, S. Lim, D. Ha, H. Chen, L. Fernandes, M. Tian, N. Afroze, P. G. Ravikumar, S. Yu, S. Datta, W. Chern, “Disturb Mitigation Scheme for Ferroelectric Field-Effect Transistors,” U.S. Patent Application 19/322,156, filed March 12, 2026.
K. Kim, D. Das, K. Kim, W. Kim, S. Lim, D. Ha, A. I. Khan, C. Zhang, C. Park, H. Chen, H. Park, M. Tian, N. Afroze, P. Hsu, P. V. Ravindran, S. Yu, S. Datta, W. Chern, and Z. Wang, “Ferroelectric Gate Stack with Tunnel Dielectric Insert for NAND Applications,” U.S. Patent Application 18/815,936, filed Aug. 27, 2024.
Related Youtube Videos
Ferroelectric NAND Flash for Radiation-Tolerant Space Storage — Asif Khan
Can Ferroelectric Memory Fix Flash Storage for AI? | Asif Khan at Technical University of Munich
Channel-Side Interlayer Engineering in Laminated Fe-FETs | Lance Fernandes, IRPS 2026
Pushing the limits of 3D NAND scaling using ferroelectrics | Prasanna Venkatesan | NVMTS 2025
Comparative Study of Channel Materials for Ferroelectric NAND Applications | Lance F. | IMW 2025
Ferroelectric NAND Storage w/ Robust Retention | Prasanna V. | IRPS 2025 Best Student Paper Award
Ferroelectrics for Storage Applications | Asif Khan | MNDCS 2025
Selected Publications
A. I. Khan, A. Keshavarzi, and S. Datta. “The future of ferroelectric field-effect transistor technology.”Nature Electronics, vol. 3, pp. 588–597, 2020. —Industry-focused, review article laying the promises and challenges of ferroelectric materials in advanced microelectronics for Big Data and data-centring computing applications. —Editorial at Nature Electronics: “Time to switch to ferroelectronics?”. https://doi.org/10.1038/s41928-020-00492-7
N. Afroze, A. Padovani, J. Choi, P. G. Ravikumar, Y. H. Kuo, C. Zhang, T. Song, M. Tian, E. Sarkar, M. Noor, P. V. Ravindran, K. A. Aabrar, B. Yildiz, S. Mahapatra, A. Kummel, K. Cho, S. Yu, S. Datta, J. H. Lee, L. Larcher, G. Thareja, & A. Khan. “Self-Healing Ferroelectric Capacitors with 1000x Endurance Improvement at High Temperatures(85–125◦C).”The 2024IEEEInternational Electron Devices Meeting (IEDM 2024), pages 4.3.1–4.3.4 (2024). https://doi.org/10.1109/iedm50854.2024.10873595
D. Das, P. V. Ravindran, C. Park, N. Tasneem, Z. Wang, H. Chen, W. Chern, S. Yu, S. Datta, and A. I. Khan, A. “A Ge-Channel Ferroelectric Field Effect Transistor with Logic-Compatible Write Voltage.”IEEE Electron Device Letters, vol. 44, no. 2, pp. 257–260, 2023. https://doi.org/10.1109/led.2022.3231123
Z. Wang, B. Crafton, J. Gomez, R. Xu, A. Luo, Z. Krivokapic, L. Martin, S. Datta, A. Raychowdhury, A. I. Khan, “Experimental Demonstration of Ferroelectric Spiking Neuronsfor Unsupervised Clustering,” The 64th International Electron Devices Meeting (IEDM 2018), 13.3.1–13.3.4 (2018). https://doi.org/10.1109/iedm.2018.8614586
Y.-H. Kuo, C. Zhang, P. G. Ravikumar, S. Kang, T. Song, M. A. Villena, L. Larcher, H. Kim, M. Hong, P. Yun, G. Thareja, S. Yu, D. Ha, S. Datta, J. E. Medvedeva, & A. I. Khan. “Experiments and Modeling of Defect Dynamics and BTI in Doped In O TFTs Undergoing Densification during 400 ◦C Post-BEOL Forming Gas Annealing (FGA).” The 2025 IEEE International Electron Devices Meeting (IEDM 2025). https://doi.org/10.1109/iedm50572.2025.11353585
Patents
A. I. Khan, W. Chern, Y.-C. Luo, N. Tasneem, Z. Wang, and S. Yu, “Methods of operating ferroelectric (Fe)FET based non-volatile memory circuits and related control circuits,” U.S. Patent No. US12200942B2, filed 12/08/2022, granted 01/14/2025.
D. Ha, P. Yoon, H. Kim, M. Hong, S. Datta, A. I. Khan, and Y.-H. Kuo, “Hybrid HfO2/Al2O3 Capping Layer for Hydrogen-Resilient Oxide Semiconductor TFTs (OS-TFTs) under High-Temperature Forming Gas Anneal (FGA),” Korean Patent Application No. IE-202512-058-1-KR0, 2026.
N. Afroze, A. I. Khan, P. V. Ravindran, Y.-H. Kuo, J. Sharda, S. Yu, E. Sarkar, S. Datta, and S. Soliman, “Self-Healing Ferroelectric Capacitors with Endurance Improvement at High Temperatures,” U.S. Patent Application No. 19/381,890, filed Nov. 6, 2025.
Youtube
Ready-to-go FE capacitors for high temperature AI applications | Nashrah Afroze | IIRW 2025
Self-healing ferroelectric capacitor for high temperature operation | Nashrah Afroze | IEDM 2024
Self-Healing Ferroelectrics for 3D-Stacked HBM and AI Hardware | Nashrah Afroze | IEDM 2024
Understanding the Process for ALD of BaTiO3 Thin Films | Jiayi Chen | AVS 2025
Ferroelectric Field Effect Transistors for Embedded Memory Applications
Selected Publications
T. Song, S. Kang, Y.-H. Kuo, J. Chen, L. Fernandes, N. Afroze, M. Tian, H. W. Baac, C. Shin, and A. I. Khan, “Hf/Zr Superlattice-Based High-κ Gate Dielectrics with Dipole Layer Engineering for Advanced CMOS,”ACS Nano, vol. 20, pp. 2092–2103, 2026. https://doi.org/10.1021/acsnano.5c15062
M. Hoffmann, Z. Wang, N. Tasneem, A. Zubair, P. V. Ravindran, M. Tian, A. Gaskell, D. Triyoso, S. Consiglio, K. Tapily, R. Clark, J. Hur, S. Pentapati, S. K. Lim, M. Dopita, S. Yu, W. Chern, J. Kacher, S. E. Reyes-Lillo9, D. Antoniadis, J. Ravichandran, S. Slesazeck, T. Mikolajick, and A. I. Khan. “Antifer- roelectric negative capacitance from a structural phase transition in zirconia.”Nature Communications, vol. 13, pp. 1–8, 2022. —Reported the discovery of negative capacitance in an antiferroelectric material. https://doi.org/10.1038/s41467-022-28860-1
N. Tasneem, P. V. Ravindran, Z. Wang, J. Gomez, J. Hur, S. Yu, S. Datta, and A. I. Khan. “Differential charge boost in hysteretic ferroelectric–dielectric heterostructure capacitors at steady state.”Applied Physics Letters. 118 (12), 122901–1–122901–5 (2021). https://doi.org/10.1063/5.0035880
P. V. Ravindran, P. G. Ravikumar, & A. Khan. “Conditions for Domain-Free Negative Capacitance.”IEEE Transactions on Electron Devices, vol. 70, no. 8, pp. 4493–4496, 2023. https://doi.org/10.1109/ted.2023.3278617
M. Hoffmann, P. V. Ravindran, and A. I. Khan. “Why Do Ferroelectrics Exhibit Negative Capaci- tance?”.Materials 3743–1–3743-.8 (2019). (invited review). https://doi.org/10.3390/ma12223743


